MIOS DIN/DOUT Pin Numbers

Sometimes the pin numbers of special DINs or DOUTs can be specified in the main.asm or setup_*.asm file of a MIOS application.

Examples:

#define DEFAULT_MIDI_RX_LED 0x40        ; DOUT SR#9, pin D0
#define DEFAULT_MIDI_TX_LED 0x41        ; DOUT SR#9, pin D1

or

#define DEFAULT_DIN_MENU_EXEC         7       ; menu exec button assigned to DIN pin #7
#define DEFAULT_DIN_MENU_SNAPSHOT     6       ; menu snapshot button assigned to DIN pin #4
#define DEFAULT_DIN_MENU_RIGHT        5       ; NOT USED - overlayed by datawheel
#define DEFAULT_DIN_MENU_LEFT         4       ; NOT USED - overlayed by datawheel

or

       ;;        SR  Pin  Mode
        ENC_ENTRY  5,  0,  MIOS_ENC_MODE_NON_DETENTED   ; V-Pot 1
        ENC_ENTRY  5,  2,  MIOS_ENC_MODE_NON_DETENTED   ; V-Pot 2
        ENC_ENTRY  5,  4,  MIOS_ENC_MODE_NON_DETENTED   ; V-Pot 3
        ENC_ENTRY  5,  6,  MIOS_ENC_MODE_NON_DETENTED   ; V-Pot 4

The following table should give you a quick overview over the numbers. Please bear in mind that we are sometimes counting from 0, and sometimes from 1.

Means: sometimes the first pin or shiftregister has number 0, sometimes it has number 1 - thats always an issue, because programmer mostly prefer to count from 0, users want to count from 1 - it's a bit of a mess! Forgive me!

In the meantime I've tried to make the setup more consistent. Shiftregisters are always counted from 1, and pins are always counted from 0

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Important Note: for DOUT shift registers, software pin-numbers will be reflected in reverse direction on hardware level:

pin-number 0 (software level) is D7 of the first shift register (hardware level), not D0!
pin-number 15 (software level) is D0 of the second shift register(hardware level), not D7!

The first shift register is for both DIN and DOUT the one that is closest to the core on hardware level.

In the datasheets of the shift-register IC's, D0 is often labled A / QA, D7 is labled H / QH.
In TK's layouts the labels for IC-pins are I0 - I7, O0 - 07, which corresponds to A/QA - H/QH.

DIN chain hardware-level: CORE ← R1::qH ← R1::H ← R1 ← R1::G ….. R2::qH ← R2::H etc.
The first bit read is DIN1::I7, this goes to the MSB on software level. MSB represents the higher pin value, so you have the same order in hard- as in software.

DOUT chain hardware-level: CORE → R1::SER → R1::A → R1::B → R1::C ….. R2::SER → R2::A etc.
first bit pushed out is LSB of the last SR(software level), this goes to Rlast::H. Last bit pushed out is MSB of first SR (software level), this goes to R1:A. On software level, MSB represents the higher pin value, so A will represent alway the higher pin value on hw-level for DOUT chains.

If you want to read more about this, refer this forum discussion:
http://www.midibox.org/forum/index.php/topic,12379.0.html

See also the following table to get a clearer picture. The shift registers have the same order on hardware than on software level.

MIOS_DOUT_SRSet / MIOS_DOUT_SRGet / MIOS_DIN_SRSet / MIOS_DIN_SRGet: LSB always reflects the lowest pin number, MSB the highest pin number.

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Ok, here the table: