#Build: Synplify Pro I-2014.03LC , Build 063R, May 27 2014 #install: C:\ispLEVER_Classic2_0\synpbase #OS: Windows 7 6.1 #Hostname: BRUNO-PC #Implementation: tlc_engine_v1b $ Start of Compile #Tue Nov 28 21:14:00 2017 Synopsys VHDL Compiler, version comp201403rcp1, Build 060R, built May 27 2014 @N: : | Running in 64-bit mode Copyright (C) 1994-2014 Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, or distribution of this software is strictly prohibited. @N:CD720 : std.vhd(123) | Setting time resolution to ns @N: : tlc_engine.vhd(10) | Top entity is set to tlc_engine. VHDL syntax check successful! @N:CD630 : tlc_engine.vhd(10) | Synthesizing work.tlc_engine.behavioral @N:CD233 : tlc_engine.vhd(43) | Using sequential encoding for type state_typ Post processing for work.tlc_engine.behavioral @N:CL201 : tlc_engine.vhd(58) | Trying to extract state machine for register next_state Extracted state machine for register next_state State machine has 3 reachable states with original encodings of: 00 01 10 @END At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 69MB peak: 70MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime # Tue Nov 28 21:14:00 2017 ###########################################################] Synopsys Netlist Linker, version comp201403rcp1, Build 060R, built May 27 2014 @N: : | Running in 64-bit mode At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime # Tue Nov 28 21:14:02 2017 ###########################################################] Map & Optimize Report Synopsys CPLD Technology Mapper, Version maplat, Build 923R, Built May 6 2014 Copyright (C) 1994-2013, Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use or distribution of the software is strictly prohibited. Product Version I-2014.03LC @N:MF248 : | Running in 64-bit mode. Encoding state machine next_state[0:2] (view:work.tlc_engine(behavioral)) original code -> new code 00 -> 00 01 -> 01 10 -> 10 --------------------------------------- Resource Usage Report Simple gate primitives: DFFRH 15 uses DFFSH 1 use DFFCRH 1 use DFFCSH 1 use IBUF 2 uses OBUF 8 uses AND2 107 uses XOR2 22 uses INV 66 uses @N:FC100 : | Timing Report not generated for this device, please use place and route tools for timing analysis. I-2014.03LC Mapper successful! At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 38MB peak: 104MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime # Tue Nov 28 21:14:02 2017 ###########################################################]