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SID and AOUT pinning


monokinetic
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[i'm not 100 percent sure this applies to the MBSID forum or somewhere else, mods please move as appropriate.]

Hi,

I have been reading through the SID source code because I want to compile for quite a specific setup. I do not plan to use any SID modules (I'll leave the SID's for the rest of you!) or slave cores, my core + aout would be on the All in one AOUT PCB which I got in the group buy. I plan to have a minimal control surface and most importantly the analogue ins because I want to use the SID engine to control some modular synth oscillators and so on, as well as process modular signals via the 5 analogue ins. I will be putting some over/negative volatge protection on the J5 pins. I plan on using a PIC18F4620 as the source code mentions in my specific hardware setup (i.e. no slaves, no SIDs) it is still ok.

I am pretty used to compiling my own MIOS apps, so I'm trying to customise the SID source to my hardware. I realised that by default SID V2 is setup to use pins on J6 for the AOUT SCLK etc connections, whereas the All in one PCB is routed to use the default MBCV pinning i.e. J10. I checked in SIDV2 main.inc and found where the AOUT pinning is overridden.

Is it ok to try and revert this setting back to the default J10 or is this going to cause me problems running the SIDV2 app?

If so, do I need to explicitly set the pins (as seen in )? Or can I just comment out the part in SIDV2 main.inc that overrides the AOUT pinning?

Thanks in advance

David

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