Ive developed a16 colour (using red/green tricolour LED) linear display strip. It features 4 i/o bits per LED. (Off, plus 3 levels of Red, 3 levels of Green, 3 levels of Orange, 6 in-between shades of orange)
The linear strip is designed to be mounted above/behind a midi keyboard key array. Possible display modes include noteon/off monitoring and showing the position of keyboard splits and zones.
Anyhow, once tested this will all be documented on my midibox blog.
One octave requires 6 shift registers. I have drafted a strip module pcb design that covers one octave. As many octaves as required are chained together. For my own use will be 2x4 octave (2x48 notes) in 2 strips.
This adds up to 48 shift register chips.
So my question relates to the maximum number of 74hc595 that can be chained. I understand it is the capacitive load of SCLK and RCLK signals to each chip that creates the limit.
1) Reduce the clock frequency of the SPI port. (Using DMA, this should have a very minimal, or negligible adverse effect on performance and is the preferred solution). Question: Where (in MIOS32) is the sr clock speed defined?
2) Provide a (stronger) buffered output to SCLK and RCLK (a buffer line driver at the start of the chain to drive these signals harder than the STM32 with pullup resistors.) Question: suggested device?