Midicv gate problem II

[theraven]

Hullo all,

as have had no response to my earlier request regarding lack of gates except A0 from coe even after enabling J5 in firmware, just had a thought, could the 2 link wires on the bottom of the core board or lack of them cause this problem.

As I noted before, everything else is functioning nicely, simply cannot get 8 x gates, only 1 from A0.

Any suggestions would be much appreciated.

Regards