MB-6582 How to test SIDs 2, 3 and 4?

[toneburst]

Hiya,

I've got the SIDs in the first 2 slots of my MB-6582 mainboard (controlled by the first Core PIC) working nicely, but I'm a bit confused as to how to test the others. I've uploaded the SID application to Cores 2 and 3 (there's still a hardware issue somewhere with the output of SID slot 7, so the final Core still has the Testone application loaded), and installed nice new SID chips in SID in all slots but the final two.

I don't seem to be able to get any sound out of them anything except the original 2 SID chips. I had kind of assumed that the Cores would operate on consecutive MIDI channels, but that doesn't seem to be the case, and I can't seem to trigger notes on anything other than channel 1, and the first core. I can hear noise from the other SIDs, but I don't get the startup jingle when I switch the mainboard on.

If I plug-in an LCD, and the display for Cores 2 and 3 just shows

MIDIBoxSID V2.0RC26

and doesn't show a patch name, like the first core does.

What am I missing?

a|x

[Wilba]

The PICs should have device ID (PIC ID) 00, 01, 02, 03.

If you got them from SmashTV they should be like this already.

You can put any PIC in any Core and it will work, so you can use one PIC with the testtone application to test the other Core/SID slots.

After, you can then upload the MB-SID application to a PIC in each Core, using J11 to switch which Core is connected to MIDI Out. All Cores are connected to a common MIDI In. The default "ensemble" should have each SID engine (Core) configured to MIDI channels 1,2,3,4.

Only the first Core makes the startup jingle, because it's actually the sound it makes when it finds a bankstick.

Likewise, you could put PIC #0 with the MB-SID application in any Core and send it note events and you should get the default patch playing on the output. You probably already validated that each Core is receiving MIDI In by uploading testtone to each Core rather than moving a PIC around. However, TK just changed the note handling for Super Poly mode so I'm not sure if that change has meant that ALL notes are routed through the master PIC to the slaves via the CAN bus.

Assuming you've already done all this (used testtone in every Core/SID combo), then the only thing I can think of is that the CAN bus that runs between them is not working.

Check you have R80 installed. It is between U1_CORE1 and U1_CORE2 (first and second PICs)

Check also the diodes under each PIC are correctly oriented... cathode end (black mark) should be lower pad.

[toneburst]

Hi Wilba,

thanks very much for getting back to me so quickly!

I've definitely got R80 installed.

So, when I turn on the mainboard, and sent notes on MIDI channels 2 and 3, I should hear sound from SID pair 2 and 3?

Is the fact that the LCD doesn't show a patch name when connected to any core other than the first one, or is this expected behaviour?

I did have the testone app working on all the Cores (though there was a problem with the audio output on SID #7).

I've put all the stuff away now, but I will check the diodes under each Core PIC tomorrow.

Cheers,

a|x

[Wilba]

So, when I turn on the mainboard, and sent notes on MIDI channels 2 and 3, I should hear sound from SID pair 2 and 3?

Yes. Unless something else happened to change the MIDI channels. Try removing all banksticks and uploading the MB-SID application again to all PICs. This should reset it to a default state.

Is the fact that the LCD doesn't show a patch name when connected to any core other than the first one, or is this expected behaviour?

Yeah, slave Cores don't write stuff to the LCD, only the bare minimum "I'm alive and this is what I have installed".

[toneburst]

Try removing all banksticks and uploading the MB-SID application again to all PICs. This should reset it to a default state.

Hmm.. I just tried this. I also checked all the diodes under the Core PICs, which look fine.

I did notice I'd only installed R6_CORE1, and not the same resistor for the other cores, but it says in the mainboard parts list that it's only necessary to install R6 for Cores 2 - 4.

I'm still not getting any sounds out of any of the other SIDs. I did notice that that level of background noise seems a lot higher from the SIDs 3 - 6.

Yeah, slave Cores don't write stuff to the LCD, only the bare minimum "I'm alive and this is what I have installed".

That makes sense.

Anything else I should try?

a|x

[Wilba]

Higher level of background noise suggests that you're not grounding the inputs (jumper in J3_SIDx, J23_SIDx).

Can you please confirm that you've tested that each SID and each SID module works, by using the testtone application in each SID module and swapping SIDs.

Uploading an app to each Core (by moving jumper in J11) validates that MIDI In/Out is working for each Core.

That would basically leave just the communication between the PICs not working.

Look closely at the PCB PDF, it will show you where the CAN bus connects pin #36 of all PICS, and connects to pin #35 of each PIC through a diode. There is also R80 which connects the CAN bus to +5V. Check all pads connected to this. Check the PIC pins are connected and there's no short between the CAN bus and +5V or ground.

[toneburst]

HI again Wilba.

Higher level of background noise suggests that you're not grounding the inputs (jumper in J3_SIDx, J23_SIDx).

I'm definitely jumpering across those pins on all the SID slots. Maybe the higher noise level is just because the SIDs aren't being controlled properly....

Can you please confirm that you've tested that each SID and each SID module works, by using the testtone application in each SID module and swapping SIDs.

I will test that next. I've loaded the testone app to all the cores though, and the SID app to all but the last core (there is still a problem with the audio output of SID #7, so the last core still has the testone app loaded), so there doesn't seem to be an issue with MIDI communication to any of the cores.

I haven't tried the testone app with the SIDS in though. I'm not sure if you're suggesting I should here.

I Will will try swapping each SID pair to SID slots 1 and 2 next.

That would basically leave just the communication between the PICs not working.

Look closely at the PCB PDF, it will show you where the CAN bus connects pin #36 of all PICS, and connects to pin #35 of each PIC through a diode. There is also R80 which connects the CAN bus to +5V. Check all pads connected to this. Check the PIC pins are connected and there's no short between the CAN bus and +5V or ground.

Great, thanks once again for the tips. I will try all these things and see how it goes.

Thanks again!

a|x

[toneburst]

Look closely at the PCB PDF, it will show you where the CAN bus connects pin #36 of all PICS, and connects to pin #35 of each PIC through a diode. There is also R80 which connects the CAN bus to +5V. Check all pads connected to this. Check the PIC pins are connected and there's no short between the CAN bus and +5V or ground.

OK, I'm not entirely sure what I'm doing here, but it seems that each core's pin 36 are connected together.

R80 is connected to 5V

The 'upper' sides of each D1_COREx diode (not the arrow end) are connected together, and all are connected to R80 also.

Any advice on which pads to test for shorts between gnd/5v? Should I be testing for shorts to gnd/5v at J71?

Also, I've swapped core PICs 2 and 3 into core slot 1, and they all seem to be able to control the SIDs in slots 1 and 2.

I've also tried all the SIDs in SID slot 1 and 2, so SIDs 1 > 6 are working, and core PICs 1 > 3 are also working. Core PIC 4 still has the testtone app, so I don't want to test this in slot 1, with SIDs connected (or should I try this?).

I did notice that the LCD connected to core slot 1, when it's hosting the two core PICs that were slaves before, doesn't show a patch name. Are the slave core PICs setup differently because they weren't in slot 1 when they had the SID app installed?

a|x

[toneburst]

Anything else I should try? I'm a bit stuck, unfortunately...

a|x

[TK.]

It's normal, the slave SIDs (Device ID >= 01) don't show a patch name, since they don't try to access a BankStick. Instead, they get their patches from the master core via CAN.

So long they haven't got a patch, they will play a simple lead instrument at MIDI channel #1

However, TK just changed the note handling for Super Poly mode so I'm not sure if that change has meant that ALL notes are routed through the master PIC to the slaves via the CAN bus.

No, Note control via CAN is only done in Super Poly mode.

Normaly, each slave receives notes directly from the MIDI Rx input

It makes sense to check the MIDI channel settings for each core in the ensemble menu (ENS->INS page)

Best Regards, Thorsten.

[Wilba]

toneburst: you are not testing things properly.

Each test is supposed to validate what does and does not work.

You can't do that with different apps on PICs, and now it's getting hard to follow what does and does not work.

So... start again from scratch. Do the following, reporting success or failure.

Take out ALL PICs.

Take out ALL banksticks.

Take out ALL SIDs.

Set J11 to 1.

Upload MIOS to PIC #0 in Core 1.

Set J11 to 2

Upload MIOS to PIC #0 in Core 2.

Set J11 to 3

Upload MIOS to PIC #0 in Core 3.

Set J11 to 4

Upload MIOS to PIC #0 in Core 4.

USING ONLY TWO SIDS MOVED EACH TIME:

Use testtone in PIC #0 in Core 1.

Use testtone in PIC #0 in Core 2.

Use testtone in PIC #0 in Core 3.

Use testtone in PIC #0 in Core 4.

Set J11 to 1.

Upload setup_mb6582.hex to PIC #0 in Core 1.

USING ONLY TWO SIDS MOVED EACH TIME:

Test MB-SID in PIC #0 in Core 1 (send MIDI notes on channel 1)

Test MB-SID in PIC #0 in Core 2 (send MIDI notes on channel 1)

Test MB-SID in PIC #0 in Core 3 (send MIDI notes on channel 1)

Test MB-SID in PIC #0 in Core 4 (send MIDI notes on channel 1)

This should validate that the MB-SID app is happily receiving MIDI in each Core.

Set J11 to 2.

Upload MIOS to PIC #1 in Core 2. <-- Change Device ID in MIOS Studio!

Upload setup_mb6582.hex to PIC #1 in Core 2. <-- Change Device ID in MIOS Studio

PUT TWO KNOWN GOOD SIDS INTO SID MODULE 2

Test MB-SID in PIC #1 in Core 2 (send MIDI notes on channel 2)

By default, PIC #1 will be configured to receive on channel 2.

PUT TWO KNOWN GOOD SIDS INTO SID MODULE 3

Test MB-SID in PIC #1 in Core 3 (send MIDI notes on channel 2)

PUT TWO KNOWN GOOD SIDS INTO SID MODULE 4

Test MB-SID in PIC #1 in Core 4 (send MIDI notes on channel 2)

[toneburst]

It makes sense to check the MIDI channel settings for each core in the ensemble menu (ENS->INS page)

Hi TK,

thanks for getting back to me.

Unfortunately, I don't have a control-surface setup yet (waiting for LED order to arrive). Maybe I can do this using the editor software....

a|x

[toneburst]

Hi Wilba,

I will go through those steps carefully. I was trying to be as logical as possible with my troubleshooting (my work involves a lot of troubleshooting, so I'm relatively used to trying to track down the causes of problems). With a completed mainboard though, there are a LOT of variables, and my knowledge of electronics is minimal, at best.... I guess I'm just a bit overwhelmed by all the possible things that could be going wrong, and not fully aware of the ways the different components interact with each other.

Anyway, thanks very much for your patient and considered replies; I appreciate your help (and of course all the work you've done in putting your design out into the public domain, and documenting it so thoroughly).

Cheers,

a|x

[toneburst]

Set J11 to 1.

Upload MIOS to PIC #0 in Core 1.

Set J11 to 2

Upload MIOS to PIC #0 in Core 2.

Set J11 to 3

Upload MIOS to PIC #0 in Core 3.

Set J11 to 4

Upload MIOS to PIC #0 in Core 4.

MIOS successfully uploaded to PIC #0 in Core slots 1, 2, 3 and 4

USING ONLY TWO SIDS MOVED EACH TIME:

Use testtone in PIC #0 in Core 1.

Use testtone in PIC #0 in Core 2.

Use testtone in PIC #0 in Core 3.

Use testtone in PIC #0 in Core 4.

Testtone app uploaded to PIC #0 in Core 1, 2, 3, 4

Audio output from SID slot 7 still not working, but test-tone output on all other channels.

Set J11 to 1.

Upload setup_mb6582.hex to PIC #0 in Core 1.

USING ONLY TWO SIDS MOVED EACH TIME:

Test MB-SID in PIC #0 in Core 1 (send MIDI notes on channel 1)

Test MB-SID in PIC #0 in Core 2 (send MIDI notes on channel 1)

Test MB-SID in PIC #0 in Core 3 (send MIDI notes on channel 1)

Test MB-SID in PIC #0 in Core 4 (send MIDI notes on channel 1)

I was able to re-upload the SID app to the PIC #0 in Core 1, 2, 3 and 4, but no audio output from SIDs except when in SID slots 1 and 2, with PIC #0 in Core 1

This should validate that the MB-SID app is happily receiving MIDI in each Core.

Set J11 to 2.

Upload MIOS to PIC #1 in Core 2. <-- Change Device ID in MIOS Studio!

Upload setup_mb6582.hex to PIC #1 in Core 2. <-- Change Device ID in MIOS Studio

PUT TWO KNOWN GOOD SIDS INTO SID MODULE 2

Test MB-SID in PIC #1 in Core 2 (send MIDI notes on channel 2)

By default, PIC #1 will be configured to receive on channel 2.

This doesn't seem to be the case, in fact. I have PIC #0 in Core 1 currently, and it only responds to MIDI on ch.1.

PUT TWO KNOWN GOOD SIDS INTO SID MODULE 3

Test MB-SID in PIC #1 in Core 3 (send MIDI notes on channel 2)

PUT TWO KNOWN GOOD SIDS INTO SID MODULE 4

Test MB-SID in PIC #1 in Core 4 (send MIDI notes on channel 2)

No audio from SIDs.

I don't know if this helps at all. I've tried to be as rigourous about this as I can. Any advice at all as to what to try next very much appreciated. Am I missing something obvious?

a|x

[Wilba]

OK, this is what does not make sense.

1. If you've uploaded using "feedback from Core" to PIC #0 in Core 2, then MIDI In to Core 2 works.

2. If you've run testtone in Core 2 and hear output from SIDs, then Core->SID is working

3. If you've run MB-SID on PIC #0 in Core 1 and can hear notes from MIDI events on channel #1, then this SHOULD WORK exactly the same if you move PIC #0 into Core 2, since the only difference between Core modules on the PCB is that Core 1 connects to banksticks and DIN/DOUT modules and the other Cores do not.

So you need to work out why Core 1 and Core 2(,3,4) are different somehow.

Given the above report, one explanation would be that your Core 2,3,4 are not receiving MIDI In... perhaps you think you're uploading when you're not really? Perhaps you have "feedback from Core" turned off in MIOS Studio? Unlikely after this much troubleshooting, but still possible.

The other explanation is the MB-SID app is just not happy running on the other Cores. The testtone app runs, but perhaps because it doesn't access banksticks or DIN/DOUT modules, it is not affected by some hardware difference, like a short on the IIC pins (J4) or DIN/DOUT pins (J8/J9).

Try to really really really prove that MIDI In works in Core 2. Using MIOS Studio and an LCD connected to Core 2, try sending text to display on the LCD using the debug utilities. Or even just alternately uploading testone and MB-SID apps (i.e. you'll hear testtone and then not, I assume).

Do that test and I'll think some more in the meantime. I may have to use the Chewbacca defence.

[toneburst]

Hi Wilba,

thanks very much for the rapid response!

OK, this is what does not make sense.

1. If you've uploaded using "feedback from Core" to PIC #0 in Core 2, then MIDI In to Core 2 works.

2. If you've run testtone in Core 2 and hear output from SIDs, then Core->SID is working

3. If you've run MB-SID on PIC #0 in Core 1 and can hear notes from MIDI events on channel #1, then this SHOULD WORK exactly the same if you move PIC #0 into Core 2, since the only difference between Core modules on the PCB is that Core 1 connects to banksticks and DIN/DOUT modules and the other Cores do not.

Yeah, I know, it's weird.

So you need to work out why Core 1 and Core 2(,3,4) are different somehow.

Given the above report, one explanation would be that your Core 2,3,4 are not receiving MIDI In... perhaps you think you're uploading when you're not really? Perhaps you have "feedback from Core" turned off in MIOS Studio? Unlikely after this much troubleshooting, but still possible.

Well, I've had 'feedback from Core' turned on all the time, so I'm pretty sure that I AM managing to upload to PICs in the other Core slots.

I just retried uploading MIOS, then the SID app to PIC #1 in Core slot 2, and it worked fine. I still get so audio from the SIDs with the PIC in Core 2 though.

If I place PIC 1 with newly-uploaded SID app in Core slot 1, then it works, but only responds on MIDI ch.1, not 2.

The other explanation is the MB-SID app is just not happy running on the other Cores. The testtone app runs, but perhaps because it doesn't access banksticks or DIN/DOUT modules, it is not affected by some hardware difference, like a short on the IIC pins (J4) or DIN/DOUT pins (J8/J9).

I'll test for shorts there, thanks for the pointers. I'm beginning to realise that my soldering has been generally sh*t on the whole of the mainboard, mainly down to not being able to get the solder to stick properly to most of the pads connected to Ground. I suspect that might be at the root of all this.

Try to really really really prove that MIDI In works in Core 2. Using MIOS Studio and an LCD connected to Core 2, try sending text to display on the LCD using the debug utilities. Or even just alternately uploading testone and MB-SID apps (i.e. you'll hear testtone and then not, I assume).

Just retried uploading the Testtone app to PIC 1 in Core 2.

App uploaded fine. However, with SIDs in SID slots 2 and 4 (ie the ones connected to Core 2), I don't get any tone from them. I get tone when I  remove the SIDs and short across the SID sockets pins 8 and 27.

Do that test and I'll think some more in the meantime. I may have to use the Chewbacca defence.

[Wilba]

Just retried uploading the Testtone app to PIC 1 in Core 2.

App uploaded fine. However, with SIDs in SID slots 2 and 4 (ie the ones connected to Core 2), I don't get any tone from them. I get tone when I  remove the SIDs and short across the SID sockets pins 8 and 27.

You have not proven that SIDs work in each SID socket. That was the point of running testtone on each Core with SIDs installed.

Bridging pins 8 and 27 only validate the audio buffer is working and that any missing audio is not due to a blown transistor etc. i.e. that a known good SID should work in that module. It does not test if the shift registers are working, and that the Core->SID data connection is working.

Run testtone app in each Core/SID module pair WITH KNOWN WORKING SIDS INSTALLED!

Then for Core/SID module pairs that do not work with SIDs, run the SID interconnection test app. It is advisable to have an LCD connected to the Core when you run this, so you know exactly which pin is being tested. Since you believe Core 1/SID module 1 are working perfectly, mark the 74HC595 used in that SID module as "good", later you can swap them into other modules to see if they work, AFTER you've done continuity tests on each IC socket, because now I'm suspecting you probably have bad ground connections on the 74HC595 sockets or some other short/bad joint.

[toneburst]

You have not proven that SIDs work in each SID socket. That was the point of running testtone on each Core with SIDs installed.

Sorry, I guess my description wasn't very clear there, but that's what I did, for Core 2, anyway. So, with the testtone app running on Pic #1 in Core 2, and two known-good SIDs in the two sockets connected to Core 2, I don't get a tone.

I've just run the same test again with PIC #1 in Core 3 and 4, with the same SID chips.

Core 3 gives on initial tone, when the mainboard is switched on, but the tone falls in pitch, glitches, and disappears after a second or so.

Core 4 gives no tone.

Bridging pins 8 and 27 only validate the audio buffer is working and that any missing audio is not due to a blown transistor etc. i.e. that a known good SID should work in that module. It does not test if the shift registers are working, and that the Core->SID data connection is working.

Run testtone app in each Core/SID module pair WITH KNOWN WORKING SIDS INSTALLED!

Then for Core/SID module pairs that do not work with SIDs, run the SID interconnection test app. It is advisable to have an LCD connected to the Core when you run this, so you know exactly which pin is being tested. Since you believe Core 1/SID module 1 are working perfectly, mark the 74HC595 used in that SID module as "good", later you can swap them into other modules to see if they work, AFTER you've done continuity tests on each IC socket, because now I'm suspecting you probably have bad ground connections on the 74HC595 sockets or some other short/bad joint.

Cool. I will try the interconnect test app. I should have thought of that myself (I remember it now from when I was building a modular SID a couple of years ago). It's quite possible there are some bad joints there. As I said, I had great difficulty soldering some of the components. At least now I have an idea where to look though!

Thanks again, Wilba,

a|x