Verification of Schematic

[novski]

HI

So, after starting my idea on march this year, i finally come to a first real development step now.

I had to buy and learn how to draw schematics and boards first soo... but finaly i made all schematic work for a Fadermodul i like.

would someone throw an eye on it?

I had problems exporting it to a good resolution witch is readable and dosen't require to much scrolling but it seams impossible becaus always when i resize it, the the text becomes unreadable.

Thats why i made a .zip file

So thanks for every suggestion of improvement on my hard work.

novski

Midibox Fadermodul.zip

[yogi]

Nice Work! Not too crowded and readable. VERY good considering this is you first project.

I haven't worked on a MIDIBox MF project, so I'm not the best judge of the over design. But, one pointer I could offer, I would suggest that you label the signals at the bus connections. Without opening the reference MF docs and noting the signal names for all the PIC's pins (the MB assignments, not Micro Chip's) I can't tell how you are using the core pins. I'm sure that on the native Sch file, you can right click to read the net labels. But in a PNG or PDF, as a reader, I can't tell if you are assigning the core's RA1(or any other) pin correct. When pins enter and exit a bus, a bad connection is hard to spot; without going pin-by-pin, reading the net assignments on the bus.

It adds more text to the Sch but I know for myself, if I label my net assignments at all the bus connections, I can at a glance or a day or two later, spot my bone headed mistakes, before the board layout. Labeling also makes it much easier for a person not familiar with your design, to follow your logic. Buses are a blessing and a curse ;)

For Verification, generating a net list is very helpful.

[novski]

Thanks yogi

I didn't know about the Netlist. Seams to be a great thing to check every connection. I will go through that this as soon i find time this week.

I named the Pin's also by the pic now. the new zip file contains that.

thanks a lot for the hint of that Netlist export!

novski

Midibox Fadermodul v2.zip

[yogi]

Hi Novski,

In most all CAD packages, every Wire and Pin has a net label, when you connect a wire to a pin or another Wire, a net is created. As you add connections, they all carry the some net label. This is what separates a true CAD program from a Drawing prog like Paint.

When your Sch is done, you should be able to generate a net list that is a text doc listing of all the nets, with all of the nodes on each net. If you set up the rules checking, the program will check that you have not connected a GND to Vcc, or two inputs. It's not 100% so your best bet is to go through the net list accounting for all interconnections.

The net list is how the PCB layout starts out, it places Package footprints with net lines connecting the nodes. As you move the footprints around, the net lines stay connected. From these you route the traces, node to node, till you have replaced all the net lines with layer traces. Auto routers try to lay out the traces for you, but your mileage may very.

By default, the nets are labeled automatically with a simple naming scheme, but changing the labels to a more meaningful names is very helpful on a large project. Keeps everything straight ;)

In Eagle PCB, (don't know the soft you'r using), when you draw a bus, you name the bus and define the nets that make up the bus. I.E. "ADDRESS:A{16..0}" the bus label is ADDRESS, the nets in the bus are A16 through A0. Then when you want to connect to the bus, you 'pull' out one of the net wires to your next node. So on one end of the bus you might connect a node to net A7, then somewhere else you make another node connection to net A7,; the software 'connects' the two nodes.

Hope i didn't talk your ear off, later.