Open drain mode for STM32 gates

[latigid on]

This might be a simple question but I don't see it documented anywhere.

 

I want to use the +5 V gates, do I simply connect the gate output to Vdd via a 220 ohm resistor? From the Core 32 schematic these are normally set for 3.3V, correct?

[TK.]

I wouldn't do this, because the danger is too high that you destroy the core IO pins if you connect the gate to the wrong plug on your synth (e.g. higher voltage output)

 

Instead, please use a 74HC541 between the J5 based gate outputs and your synth. It will also act as a level shifter, see http://www.ucapps.de/midibox_seq_manual_hw.html

(search for "CV Outputs")

 

Best Regards, Thorsten.

[latigid on]

Yes, this makes sense. Apologies, I did see this note but wanted to avoid the 74HC541 because I am already buffering the gates with my break out board:

 

 

I wonder what is the best way to proceed while still using the board that I have. Do you think the buffers here would offer sufficient protection to simply use pull up resistors like I thought? Or would it be better to make use of a trimmer pot to have more control over the gain?

 

[TK.]

RESET!

 

Why do you want to shift the voltage level to 5V, if your buffers already allow to change the gain factor?

I see no need for a level-shifter (and it won't add more protection).

 

Best Regards, Thorsten.

[latigid on]

Just because I have things soldered already :smile:

 

I was hoping for switchable gain between +5 V and something arbitrary like +12 V, but like you say I can just fiddle with the feedback resistors to tailor the gain level.

 

Many thanks and greetings,

Andy 

 

Edit: the gates should be enabled, but not in open drain mode, correct?

 

J5_ENABLED 1

 

 

 

Edited May 20, 2013 by latigid on

[latigid on]

And dare I ask, in what situations would one use open drain mode? 

 

[Duggle]

The pins are 5V tolerant, so you could have a pullup to 5V and output 0..5V logic levels.

[latigid on]

My plan, unless anybody tells me otherwise (please do if this sounds stupid) is to solder 220 ohm resistor arrays to the core32 pcb in order to achieve the +5 V signals.

 

Will this work with all outputs, including the 8 gates, MIDI I/O 3 and DIN sync start/clock? Or do these pins also require setting to open drain mode?

 

Thanks,

 

EDIT: or is 1k or 10k more appropriate? There is a +5 V rail running very close to J5A/B/C

Edited May 21, 2013 by latigid on

[Duggle]

It depends on the load that the output is driving.

1k to 10k sounds more reasonable for high impedance inputs than 220R.

 

I am about to use the triggers (4) to drive the footpedal inputs of an RC-50 Loop Station.

To do this I'll have the outputs in pushpull (LPC17 Core) drive the LED of opto-isolators via 220R in series.

The opto's will provide isolation to remove ground loops between SEQ and Looper. 

[latigid on]

I have 10k resistor networks connected to each gate and DIN sync, and the common pin is showing +5V. 
 
In the HW file I have 

 

J5_ENABLED 2

 

But I only see around 3.7 V for each gate. 

 

Any suggestions?

 

[TK.]

That's unfortunately correct. All analog pins of the STM32 have internal protection diodes against 3.3V, therefore the 5V level can't be reached.

 

Best Regards, Thorsten.

[latigid on]

Thanks TK, but I seem to be getting conflicting advice. What does the setting "J5_ENABLED 2" actually do then? 

 

[TK.]

It enables open drain mode as expected...

 

But I didn't remember anymore, that IO pins of a STM32 device with optional analog function are not 5V tolerant.

I'm sorry for the wrong and confusing advice!

 

So: the only solution is to change the hardware as proposed in my first reply.

 

Best Regards, Thorsten.

[latigid on]

No worries, it's outmoded hardware anyway  :tongue:

 

Hopefully I can come up with something to work with my board layout.