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CSC

up tp 256 Enable Lines (E) "CLCD HD44780"

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Hallo there

I´ve read that i can connect / control up to 256 Enable Lines @ ucapps

"Multiple Character LCDs

MIOS32: the standard CLCD driver is prepared for controlling up to 256 enable lines selected via MIOS32_LCD_DeviceSet().

Connectivity: any free pin of the STM32 and LPC17 can be used for the enable line. For instance, if your application doesn't use the analog pins at J5A/B/C of the core module, you are able to connect 12 additional LCDs. You could also program a multiplexer interface in order to address even more LCDs by routing the enable line to one PIC pin.

Wiring Diagram: mbhp_nxclcd_mios32.pdf"

My question is:

Is it possible, to connect the [E] Enable Line from the Displays through a DOUT Pin ?

Greets

Chris

mbhp_nxclcd_mios32.pdf

74HC_HCT595.pdf

stm32f103re.pdf

mbhp_core_stm32_v2.pdf

hd44780_II.pdf

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Yes, it is.

Things to consider:

* Extra overhead for writing the DOUT pins

* Max. LCD update rate = DOUT update freq / Number of LCDs

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Thanks!

The extra writing is not the point...

I had quit Problems with the GLCDs (PCD8544).

They are so "rubbish" and very bad to solder with that small Pads.

After, light touching, the first solder pads torn down.

Thats so rubbish!!!

I will buy the good old CLCD Displays and build this in.

That is a good, old school, choise.

BUT BACK TO BASIC.........

Max. LCD update rate = DOUT update freq / Number of LCDs

Can tell some more details?

:question:? ! the refresh rate is only fast as the 595 (Multiplexer) can switch :question:

For 595, is the switch time from pin to is around 20-25 ns

When i have 8 Enable Lines for the Displays at DOUT Pins, the fastest / maximum Update Rate could be around 200 ns

Edited by CSC

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MIOS8 by default updates the SRIO chain @ 1kHz.

8 enable lines => 1kHz/8 = 125 Hz.

Sidenote (for more detail read the datasheet): The 25ns is the time it takes to switch the pin. Not the time it takes for you to write the entire shift register.

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MIOS8 by default updates the SRIO chain @ 1kHz.

8 enable lines => 1kHz/8 = 125 Hz.

I found this in the forum:

at Screenkeys

At 1 MHz, the CPU can execute up to 10 instructions (note that a branch/goto will cost 2 cycles!) - this should be sufficient, considered that the driver is written in assembly.

Future compatibility with MBHP_CORE_STM32:

I've proven, that this clock synchronisation method also works with STM32F103, see sid.c driver.

At 72 MHz, there are enough cycles free so that assembly language isn't really required. Even 4 MHz should be achievable.

Alternatively, we could use one of two available SPI ports of the MBHP_CORE_STM32 module (J9 or J16) for full background control w/o bitbanging. This would restrict some usecases (e.g. DOUT SRIO or I2S normaly connected to J9, SD Card normaly connected to J16), but would unload the CPU almost completely, so that LCD transfers can be handled from a background task w/o disabling interrupts. As most application won't require a SD Card, J16 is really predestinated for such jobs.

I hope that this information wasn't too confusing...

When i calculate now.

I see a rate more about 125kHz at 8 enable lines with the STM32 (4MHz).

I need details.

In the Datasheet i´ve read

Correspond to high speed MPU bus interface

- 2 MHz (when VCC = 5V)

-External clock frequency (fcp) min.125kHz typ.250kHz max.350kHz

-Clock oscillation frequency (fOSC) min.190kHz typ.270kHz max.350kHz

and

Relationship between Oscillation Frequency and Liquid Crystal Display Frame

Frequency

The liquid crystal display frame frequencies of Figure 22 apply only when the oscillation frequency is 270

kHz (one clock pulse of 3.7 ms).

1/8 duty cycle

1 frame = 3.7 μs * 400 (clocks) * 8 = 11850 μs = 11.9 ms

Frame Frequency = 1/11,9ms = 84,3Hz

I DON´T REALLY UNDERSTAND, WHAT THE PROBLEM IS..?!

The Displays show only defined Values and Setups. They don´t display any Animated Graphics.

Only 1 of the 8 or 16 CLCDs shows the actual TrackTime.

When my C Programming scills are so good, i will let one of them act like a Anaylzer Display.

Must be the Update frequence so high to drive them with the Enable line over a DOUT PIN?

:question: I´m confused !! :question:

Edited by CSC

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I DON´T REALLY UNDERSTAND, WHAT THE PROBLEM IS..?!

There is none.

I´m confused !!

Obviously.

Your average LC display doesn't even display changes properly if the update rate is > 20fps since they're typically very sluggish, so anything above that is a waste of CPU time anyways.

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For this thinks, i had to display on the screen, are the technical features from the Core32 big enough.

I will see, when the displays are playing...... (or not)

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