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Posted

Hey TK, again because of that Analog IN: Tried it on the second SID I built. Still the same: Really not very loud. Hardly hear it.

... ... Whats up? I dont get it...

  • 2 weeks later...
Posted

I have decided not to finish the single 4-SID PCB I had started laying out.  Thanks for all your help anyway Thorsten, and the answers are still very insightful.

Instead I think I will simply etch all of the layouts required on to one big PCB and just connect them that way.

My reasoning?  Well, I decided that if I start to change things around too much then I risk losing long-term compatibility with future advancements to the project / platform.  For example Thorsten's new suggested power supply wiring seems very solid, and if I had created the big board such a modification would be very inconvenient.  Also Thorsten recently made mention of possible panning using a forthcoming "AOUT" module, and my design may have omitted a port to plug such a module in on.

I was initially worried that 4 cores and 4 SID modules would be an unmanageably large set of boards, but as has been demonstrated, with a little coaxing they will fit into a C64 case.  So there really is no need to try to reduce the component count or increase the efficiency of the layout.

I do have one other little tidbit of info though:  my work uses a PCB layout program called "Protel 99SE", which I decided I would try to learn for this little project.  I don't know what other PCB/schematic software is like for Windoze, but I have decided (based on my weekend's experience) that Protel ranks pretty high on the stink-o-meter.  Part of my decision to stop working on the board is based on about 10 hours of frustration  working with this crappy pcb software.  (FWIW it seems powerful but has a ridiculous user interface)

  • 8 months later...
Posted
Nebula: Should be able to take the 1 MHz clock from one core module and split it between all 4 SIDs, eliminating 4 x 1 MHz oscillators,  

TK: this doesn't really make a difference, but it's ok. Note that neither the master, nor the slaves are exactly synchronized.

I've got some more questions on this topic,

1) Does every slave-CORE send out this 1MHz clock or only the master ? IOW can each SID have the clock from its own CORE or does it have to come from only the master ?

2) On the slave PIC's, is it OK/better to connect all unused pins to gnd or can/must they be left unconnected ?

tnx

Posted

Hi,

every SID core module drives a 1 MHz clock, so I think it's better to use them seperately. In fact a SID slave is a totally independent synth module which could also be used standalone. A master is nothing else than a slave + the control surface with the capability to send parameters to up to 4 slaves...

You could connect the analog pins (J5) to ground, but in fact this doesn't make a big difference so long as the AIN driver of MIOS is disabled. Don't forget the pull-up resistors! Don't connect the remaining free pins (e.g. the LCD port) to ground or +5V!

Best Regards, Thorsten.

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