thomerow Posted February 17, 2011 Report Share Posted February 17, 2011 (edited) Hello MIDIbox-forum! I have a general question regarding the design of the SID module. It's not directly MIDIBox SID related, but I hope it's OK if I post my question in this forum nevertheless. The only thing I am looking for is a cue in the right direction, and I thought perhaps someone will take the time and write one or two sentences to clear things up. First a quick explanation why I came here: In the last couple of weeks I have been working my way towards a possibility to drive a MOS8580 with an Arduino. I (a total microcontroller newbie, by the way) am doing this mainly for the fun of it and to learn something about microcontollers and electronics in general. The main problem with connecting the Arduino resp. Atmega328P to a SID directly is the lack of a sufficient number of pins, so I googled for a possibility to convert serial to parallel data. Of course, relatively quickly I learned about shift registers ;) . When I looked for examples concerning the connection of a SID to a microcontroller, I found out about the MIDIbox SID project and looking at the schematics discovered that the "SID module" uses two 74HC595s to drive the SID's address and data pins. Now here's the thing which confuses me about that and which I hope someone can clear up in a few words: The two 74HC595s are connected to the PIC via the same clock and latch pins and the serial data is looped through the first 74HC595 through port O8 into the serial input of the second 74HC595. If I'm not mistaken, this means in general that the parallel output pins of both chips are always exactly in the same state at the same time. How on earth does the SID know in which moment the address is sent to it and in which moment the data arrives? Is there a slight time-offset between the moments the output pins of the 74HC595s are set which is just long enough to differentiate between addresses and data just because the serial data has to run through one of them? As stated I would be happy about a short clarification but would also understand if my question is ignored because it is slightly off topic. Kind Regards Thorsten Edited February 17, 2011 by thomerow Quote Link to comment Share on other sites More sharing options...
nILS Posted February 18, 2011 Report Share Posted February 18, 2011 Welcome aboard Thorsten :flowers: Ah yes, the joys of reinventing the wheel :thumbsup: this means in general that the parallel output pins of both chips are always exactly in the same state at the same time. No, it doesn't. That should answer all your other questions as well, right? Quote Link to comment Share on other sites More sharing options...
thomerow Posted February 18, 2011 Author Report Share Posted February 18, 2011 (edited) Thanks for the warm welcome, nILS! That's exactly the type of answer I was hoping for. On to further research! This is gonna be a long weekend :ahappy: Edited February 18, 2011 by thomerow Quote Link to comment Share on other sites More sharing options...
technobreath Posted February 19, 2011 Report Share Posted February 19, 2011 Good luck. Maybe u could come back and show us the results of ur work, would be fun to see what u get out of ur project. Quote Link to comment Share on other sites More sharing options...
TK. Posted February 20, 2011 Report Share Posted February 20, 2011 The trick: you can shift any data to both SIDs as long as the CS# line is individually controllable. Register accesses will only happen on a 1->0 transition. See also this source, SID_UpdateReg() function. The code also shows how dual SID transfers can be optimized by checking if the same value has to be transfered to both SID chips - in this case both CS# lines are activated to avoid a redundant SR load. Best Regards, Thorsten. Quote Link to comment Share on other sites More sharing options...
thomerow Posted April 14, 2011 Author Report Share Posted April 14, 2011 (edited) Hey guys! I'm very sorry for seemingly "ignoring" your posts! Somehow I managed to misconfigure the notification options and didn't notice your replies. I must admit that I haven't gotten very far with my SID-project in the last few weeks (at least not as far as I'd like to). The main problem is, of course, the lack of free time. I could only manage to spare one or two days a week for working on it. Nevertheless I learned quite a few things so far! I programmed a simple firmware parsing midi messages and converting some of them into SID instructions, learned about the perils of static electricity the hard way (I killed 2 (!) SIDs while experimenting with them) and etched two PCBs using the "direct toner method" (one of them double sided!). I even own an oscilloscope now. :ahappy: So the whole thing is producing sound, and by "hard wiring" some midi contol messages to some basic SID-features like the ADSR-envelope, the filter frequency and the resonance I am able to play it "monophonically" using my old midi-keyboard (which has some assignable control dials). This is what it looks like so far (yes, the board holding the sid is a modified version of the MBHP SID module lacking the audio input and the voltage regulating circuitry): @TK.: Thanks for the link to the source file! I just skimmed through it and will definitely have a closer look into it because so far I'm not taking account of the rising and falling edges of the SID clock at all. I haven't had the chance to advance the whole thing for three weeks now, but I will definitely post again if I have put everything into a nice case and added some buttons and a display. (IF that day ever comes…) Regards, Thorsten Edited April 14, 2011 by thomerow Quote Link to comment Share on other sites More sharing options...
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