x0x style seq... Need hardware help (LONG post!)

[TL]

@SmashTV

I think I will first verify the complete schematic first, so you've only do the board one time... And actually I'm not completely sure about some small things of my current design... ;)

Thank you for doing the board!  8)

@stryd_one

Currently I'm still not sure if this is really faster than using 2 latches, since the calculation of the address lines also takes some time, especially  if the address lines are scattered to different ports of the PIC. If the larger 512k x 8 SRAM would be used the address lines A8 - A18 would go to 3 different ports of the PIC.

Also with the bigger SRAM J5, J7 and J10 could not used for other modules any more...

Maybe I'm wrong about the the address lines calculation time.

Any input about this subject is really appreciated!  :)

@all

For chip availability and prices:

128k x 8 should be available almost everywhere:

Mouser part no. 511-M68AF127BM70B6U cost $3

Reichelt part no. 628128-70 cost € 2.20

512k x 8

not available at mouser, but at reichelt:

part no. 628512-70 cost € 4.25

All parts above are DIL/DIP packages, I think it's easier to solder for most of us.

Since I'm from germany I don't know much about part suppliers outside germany, maybe everyone reading this could look at his favourite part supplier for SRAM 128k x 8 and 512k x 8 if it's available.

[cheater]

I think maybe the humourous tone in cheater's post was lost... Or maybe I'm just a little too light-hearted and he was really being malicious... But I think for the sake of friendly conversation I will assume he was being funny.... WEREN'T YOU CHEATER!!! WEREN'T YOU!!!!!!!!! [move]twisting your arm[/move] ;D hehehe

hey cheater next time use one of these:  ;)  ;D

Smash, I reckon you're right on the money. Availability/performance/price. Now I will openly admit that I have no clue on how to find these things, aside from searchin on ebay :) (PS no hits at all on any of the SRAM types, darn.)

I'll let the pro's make the call as to which chip is the one to go for. Obviously the bigger the better.

Also, thanks for taking on the work of PCB design smash. There is absolutely no rush and no pressure, do this in your own time. We are lucky to have you show such generosity at all, and I'm sure noone will rush you.

WILL YOU? WILLL YOOOOU!!!??? ;D

heheheheheheh

todd...who just can't seem to act serious!

I will eat your powerplants.

KILL ALL HU-MANS!

[stryd_one]

Okay obviously I'm not the only crazy guy here  ;D

Smash's point has just been very clearly made in another thread... Despite all intentions of humour, obviously on a board where English is not the only language used, and not always the 1st language of the poster, sarcasm is NOT a good idea around here, so I will attempt to refrain. For your own sake, I would advise for you to do the same cheater, before communications breakdowns cause more unneccesary arguments. But you're more than welcome to be as sarcastic as you want if you PM me :)

[stryd_one]

@stryd_one

Currently I'm still not sure if this is really faster than using 2 latches, since the calculation of the address lines also takes some time, especially  if the address lines are scattered to different ports of the PIC. If the larger 512k x 8 SRAM would be used the address lines A8 - A18 would go to 3 different ports of the PIC.

Also with the bigger SRAM J5, J7 and J10 could not used for other modules any more...

Maybe I'm wrong about the the address lines calculation time.

Any input about this subject is really appreciated!  :)

@all

For chip availability and prices:

128k x 8 should be available almost everywhere:

Mouser part no. 511-M68AF127BM70B6U cost $3

Reichelt part no. 628128-70 cost € 2.20

512k x 8

not available at mouser, but at reichelt:

part no. 628512-70 cost € 4.25

All parts above are DIL/DIP packages, I think it's easier to solder for most of us.

Since I'm from germany I don't know much about part suppliers outside germany, maybe everyone reading this could look at his favourite part supplier for SRAM 128k x 8 and 512k x 8 if it's available.

It seems to me that twice the price for 4 times the RAM is a good deal... I think we should aim to support 512kx8 chips, and then everything smaller will be backwards compatible with minor software changes.

You're right about the latching. I hadn't considered that the individual pins will need to be set with a BSF rather than a MOVWF to the whole PORT (either operation takes the same amount of cycles), and when this is taken into consideration, if setting a number of pins, having the latch will not make a major performance drop... However when doing burst transfers, we may only want to change the value of one of the address pins, and so then it would be faster to avoid the latch... For example if only one pin from J10 is used, then that pin could be assigned to the last address bit, and then changing the last bit would be very fast (for reading the next byte from RAM).. Then the two address lines from J7 could be the 2nd and 3rd last address bits, and the three pins combined would allow for fast burst transfers up to 8 bytes. Please correct me if I've missed something.

The J5, J7 and J10 pins should still work OK in conjunction with the SRAM for most applications, as passing data to the modules connected to those pins would need to be enabled by the module's own write enable bits. That is just a matter of making sure that the WE for the SRAM does not use the same pins as the WE for the other modules such as the MBFM or MBSID, for example.

[smashtv]

I will eat your powerplants.

KILL ALL HU-MANS!

hehe....In my best "Great Guidance" voice: Don't kill the one they call TK, he's the only one who can repair the ship.  Oh and by the way, You must kill Alice.  ;D

That movie is proof that they had much better drugs in the 50's.    ;)

While we are way left-of-center (or right of center for you guys in the UK) I'm on a worldwide quest for an English dubbed DVD of Inframan, Need something better to tease the wife with these days since putting in the Tron DVD when she wants to watch a movie just is not working anymore....... ;)

Smash

[jdutcher]

That movie is proof that they had much better drugs in the 50's.    ;)

While we are way left-of-center (or right of center for you guys in the UK) I'm on a worldwide quest for an English dubbed DVD of Inframan, Need something better to tease the wife with these days since putting in the Tron DVD when she wants to watch a movie just is not working anymore....... ;)

Smash

hahahahaha...definitely enjoying that one, smash.

i'm not even following this thread very closely (just checking in from time to time), but things are getting quite interesting.  keep up the good work, all.

(sorry to take up space on this thread without offering anything...won't happen again, i promise ;))

P.S. Tron = best movie ever.

[stryd_one]

FYI.....

I've got some new features that will be included (processing power permitting)...

MIDI CCs and notes will now be able to be used to modulate tracks location or play speed by time... Like you can assign the modwheel (or note numbers if you want to use keys) to the track to 'jog' it forward and backward... or if the track is currently playing, it will speed and slow the track (a la DJ's cueing records for beatmixing by spinning them with their finger)

CC's/NRPN's/Note numbers will act either in absolute or relative mode. This means that you can do the normal stuff like CC#1=86 (absolute), or relative mode, where for example CC#1=86 will increase the current CC value by 24 (64 is the centre, 84 is 12 up from there) or CC#1=20 will decrease the current CC value by 44,etc

Looking forward to the SRAM goodies after Easter :)

Todd

[TL]

Hehe, my prototype is up and working.  ;D

Currently without battery backup but I will test this momorrow or monday...

[stryd_one]

8) BAD ASS!!!  :D

I assume you breadboarded it? How many latches?

Nice one dude

[TL]

Yes, did it quickly on breadboard.

Two latches and the remaining address and control pins directly to J5....

I will post wiring diagram,pictues and my test program tomorrow the next days.  ;)

[stryd_one]

Dude you're on fire!

I'm going to have to quit my job or you'll leave me behind  ;)

[TL]

Current status:

Yesterday I soldered the battery backup circuit and yes the SRAM kept the data since yesterday with only the battery... 8)

Before releasing the schematics I want to do some more tests.

For example I'm currenrly using a SRAM with 55ns access time, I want to try it with the more common type with 70ns. (this is only a software driver thing)

Also I've no 512k x 8 SRAM at the moment, I think this sould be tested, too. ('I'm using 128k x 8 currently)

[stryd_one]

Great stuff TL :) Keep up the good work bro :)

[stryd_one]

Probably a bit late, but I found this:

http://www.captain.at/electronics/pic-ram/

Would be MUCH slower of course.....

[TL]

@stryd_one:

this is nearly the same schematic, only with serial interface.

@all

everything works, the only untested thing is the 512k x 8 SRAM, but this should work to 99%  ;D

Currently I'm doing some enhancements to the MIOS driver, so it's not available yet.

@SmashTV

Can I send you the eagle schematic file?  ;)

Schematic

Some pictures

[stryd_one]

Badass  ;D

[TL]

Update:

My driver sram.inc for the SRAM is ready.  :)

It implements 2 access types:

- byte read/write

- "page access" to the SRAM, this reads/writes 256bytes at once

Also included is a small MIOS test application.

Download

[TK.]

General tips for improvements:

• interrupts don't need to be disabled - currently it would be difficult to use the functions if interrupts are already disabled by the function which calls the subroutine (for any reason)
  
• use FSR1 instead of FSR0 like every MIOS routine - so that the program can use FSR0 for something else
  
• add a "movf MIOS_PARAMETER1, W" at the end of SRAM_Read, this saves code size on the calling routine (e.g. call SRAM_Read, movwf MY_VARIABLE)
  
• the PAGE* functions should access pages of 0x40 bytes, this makes it compatible to the MIOS_*_PAGE* functions
  
• variables like SRAM_ADDR should always be defined in app_defines.h to improve the oversight. An hint in the source code, that these registers must be defined, should be enough
  
• I would suggest to make the port for the SRAM control pins (currently LATA) and maybe also for the data/address port definable. See the aout driver (aout.inc) as an example
  

Best Regards, Thorsten.

[TL]

Thanks for the hints Thorsten.  :)

This project was my first real contact with PIC asm and I know my code is far from perfect...  ::)

[stryd_one]

You bloody beauty!  :D

Nice one TL...

Want me to do those code changes? I have to be honest, it doesn't seem that my help is at all required!  :) But I'm more than happy to take care of it, you must have spent a lot of time on this already.

Thanks man!!!!!!!!!!!!!!!

Thanks TK!!!!!!!!

[TL]

thanks for your offer, but I've done most of TKs suggestions already yesterday.  ;D

Yes you're right in the beginning of this driver/app I've spend really a *lot* of time learning by doing  ;)

but in the meantime it's much better  ;D

It's really fun to learn some PIC asm 8) ...

[stryd_one]

Nice one dude :)

I am in the middle of moving house right now so I missed these updates on the weekend... You reacted pretty quickly :)

It is fun to learn though isn't it? :) I am really excited, I'm going to be setting up the lab and tinkering with things and breaking them soon :) hehehe Can't wait!

[TL]

Updated app:

Download

[el-bee]

DIY x0x-style seq, just the thing I've been looking for to pair up with Trevor's 909-boards! \o/

TL, any chances of making some functional suggestions for the sequencer firmware? The thing I'd like to see would be a few non-x0x playmodes (pingpong/random/reverse)..

Unfortunately I have no coding skills whatsoever so can't participate to that end no matter how much I'd like to :(.. However, hardware is a totally other thing; I'd be interested in drawing a single-board version out of this mbx0x-thingie.. Any need for that? If so, what other MIOS-modules will be required? 1xDOUT and DIN maybe?

I've also spent quite some time trying to figure out different ways of making a sequencer panel UI as intuitive as possible, so can share my pointers on that too if needed..

[TL]

@el-bee:

Actually stryd_one is working on the sequencer firmware...  :)

I just made the memory extension for the PIC because stryd_one needs more memory for the x0x firmware.