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Harmonic Table Matrix


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I am working on a harmonic table midi keyboard inspired by http://wiki.lvl1.org/Isomorphic_Keyboard

This will be a grid of 21x12 keys with two switches per key. Two sets of matrix switches, one upper PCB and one Lower PCB to.determine velocity.


I was concerned about scanning two large matrices, but the keys repeat along its length,


By duplicating the lines in, the 21x12 matrix can be reduced to 7x12. This should hopefully reduce the total matrix scanning time with only sacrificing the option to designate keyboard sections to different channels.



Are there any problems to this approach?

Regarding resistors, do I need any on the lines in/out and if so should they be before the line split or after?

Thank you for the help.

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16 hours ago, Redgeneral said:

I am working on a harmonic table midi keyboard inspired by http://wiki.lvl1.org/Isomorphic_Keyboard

Did you know that there's here more than this link? I found some thread about it.
LVL1 is @TAG here ;)

I just typed "isomorphic" in the search and there's a lot of topics with some different approach like wilba's one, that can maybe help you, don't know.

Same as @Phatline I can maybe help you but you have to explain more cause(maybe it's just me) I don't understand which line you want to duplicate, for me duplicating the lines will not reduce your SRIO scanning except if you duplicate the SRIO itself... and MIDI channel part assignment is another thing(comes after).


Edited by Antichambre
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I've been working my way through the search results of this forum, its how I reached the approach by @TAG

Split lines on top pcb:

Each section contains the same notes (octaves 1-7) and a duplicate of the matrix. When a note is hit, e.g. C4, it shouldn't matter which section it is from.

As well as only a smaller matrix to scan, there is the possibility of adjustable length to the keyboard by addition or removing sections. This doesn't affect the range of notes.

The Midi channel could be assigned based on rows, but not by section due to the repeated lines.

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So you do not care what section you hit. Why? that's a shame cause the SRIO is able to handle it even if you've got 2 switches layers and with not too much latency.
it's 3 registers out x 3 registers in. The scanning order of your buttons is important as you can measure correctly the duration between 2 associated Switches.
But maybe i'm wrong, @Phatline@latigid on is an expert in switches matrix and BLM, ask him maybe!


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It looks like you would need 3 Dout in the above diagram or you are not going to have the button count you want. The way it is drawn you will have 3 sets of duplicate buttons. That does not sound like what you want. You could split the lines like you show for the velocity section if you feel you will never want to know velocity if you are hitting the same notes in multiple sections at the same time. This use case for scanning all 3 sections would come up if you were playing cords, slides and if you were playing a bass section and a melody on the other hand. There are likely other use cases if you consider things too. Splitting lines really does not make sense from a design perspective though as the CMOS cost is very low compared to button cost. If you are wanting to reduce components or costs it might make more sense to only start with one section and have an octave button and design with a modular approach where you can add sections if and when needed or wanted. Antichambre is basically saying the same above, hope this is giving you some other thoughts and hints around his initial "Why" question.

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And if you want the 2 layer switch. try to use 24 DIN lines with 21 DOUT scanlines, maybe with even DIN lines connected on top and odd on bottom switches as you can apply some mask in the software  and calculate the duration easily,
Anyway keep the 2 layers on the same scanline, easy addressing will help you to compare the timestamp pairs.
Just an idea.

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You can find inspiration from the BLM Modules in the SVN.

With an STM32F4 core:
SRIO with Default MIOS32_PRESCALER_128, a scanline will take 36us.
84/128=0,656Mhz => SPI clock period is 1,52uS
Your total scan line is: 1,52 * 24 = 36,57 us
For you to know that the SRIO scan a line every ms, then your total scan will take 21ms

For better accurate you can write your own module to scan all lines within the 1ms period:
36,57* 21 = 768uS
If the remaining time for other processes is not enough(here 1000-768=232us) and your circuit permits it,  you can decrease the prescaler to 64, total scan will be 384us...
Try to debounce in circuit too ;)

What I told you is just some track to explore! it's not a ready-made truth ;)
Prototype it and code it before pcb design! ;)

Have fun

Edited by Antichambre
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You can prototype with just 1 din and 1 dout. Once you have the basic idea up and running you can add to it. Much faster to start with something small and then build on your successes. There is even a matrix pcb that you could bread board a few tact switches for very little $ and have a test environment up and running very quickly. Maybe even a day or two...




The only other part you would need is the core and core PCB:




Good luck with it looks fun!

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