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FantomXR

Adding CS-line to AINSER8

14 posts in this topic

Posted (edited)

Hey people,

I'd like to add one or two chip-selects for the AINSER8. I've already made a few changes to the firmware but it's not working yet.

Under modules I've edited the ainser.c:
 

{
  switch( module ) {
  case 0: return MIOS32_SPI_RC_PinSet(AINSER_SPI, AINSER_SPI_RC_PIN_MODULE1, value); // spi, rc_pin, pin_value
  case 1: return MIOS32_SPI_RC_PinSet(AINSER_SPI, AINSER_SPI_RC_PIN_MODULE2, value); // spi, rc_pin, pin_value
  case 2: return MIOS32_SPI_RC_PinSet(AINSER_SPI, AINSER_SPI_RC_PIN_MODULE3, value); // spi, rc_pin, pin_value

#if AINSER_NUM_MODULES > 3  
# error "CS Line for more than 2 modules not prepared yet - please enhance here!"
#endif
  }

and ainser.h:

// Which RC pin of the SPI port should be used for the third module
// allowed values: 0 or 1 for SPI0 (J16:RC1, J16:RC2), 0 for SPI1 (J8/9:RC), 0 or 1 for SPI2 (J19:RC1, J19:RC2)
#ifndef AINSER_SPI_RC_PIN_MODULE3
#define AINSER_SPI_RC_PIN_MODULE3 2
#endif

and mios32_spi,h
 

#define MIOS32_SPI2_RCLK1_PORT GPIOA // RC1
#define MIOS32_SPI2_RCLK1_PIN  GPIO_Pin_15
#define MIOS32_SPI2_RCLK1_AF   { GPIO_PinAFConfig(GPIOA, GPIO_PinSource15, GPIO_AF_SPI3); } // only relevant for slave mode
#define MIOS32_SPI2_RCLK2_PORT GPIOB // RC2
#define MIOS32_SPI2_RCLK2_PIN  GPIO_Pin_8
#define MIOS32_SPI2_RCLK2_AF   { }
#define MIOS32_SPI2_RCLK3_PORT GPIOC // RC3
#define MIOS32_SPI2_RCLK3_PIN  GPIO_Pin_1
#define MIOS32_SPI2_RCLK3_AF   { }
#else
      MIOS32_SPI2_RCLK1_AF;
      MIOS32_SPI2_RCLK2_AF;
      MIOS32_SPI2_RCLK3_AF;
      MIOS32_SPI2_SCLK_AF;
      MIOS32_SPI2_MISO_AF;
      MIOS32_SPI2_MOSI_AF;

      if( slave ) {
	// SCLK and DOUT are inputs assigned to alternate functions
	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
	GPIO_InitStructure.GPIO_Pin  = MIOS32_SPI2_SCLK_PIN;
	GPIO_Init(MIOS32_SPI2_SCLK_PORT, &GPIO_InitStructure);
	GPIO_InitStructure.GPIO_Pin  = MIOS32_SPI2_MOSI_PIN;
	GPIO_Init(MIOS32_SPI2_MOSI_PORT, &GPIO_InitStructure);
    
	// RCLK (resp. CS) are configured as inputs as well
	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
	GPIO_InitStructure.GPIO_Pin  = MIOS32_SPI2_RCLK1_PIN;
	GPIO_Init(MIOS32_SPI2_RCLK1_PORT, &GPIO_InitStructure);
	GPIO_InitStructure.GPIO_Pin  = MIOS32_SPI2_RCLK2_PIN;
	GPIO_Init(MIOS32_SPI2_RCLK2_PORT, &GPIO_InitStructure);
	GPIO_InitStructure.GPIO_Pin  = MIOS32_SPI2_RCLK3_PIN;
	GPIO_Init(MIOS32_SPI2_RCLK3_PORT, &GPIO_InitStructure);

	// DOUT is output assigned to alternate function
	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
	GPIO_InitStructure.GPIO_Pin  = MIOS32_SPI2_MISO_PIN;
	GPIO_Init(MIOS32_SPI2_MISO_PORT, &GPIO_InitStructure);    
      } else {
	// SCLK and DIN are inputs
	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
	GPIO_InitStructure.GPIO_Pin  = MIOS32_SPI2_SCLK_PIN;
	GPIO_Init(MIOS32_SPI2_SCLK_PORT, &GPIO_InitStructure);
	GPIO_InitStructure.GPIO_Pin  = MIOS32_SPI2_MOSI_PIN;
	GPIO_Init(MIOS32_SPI2_MOSI_PORT, &GPIO_InitStructure);
    
	// RCLK (resp. CS) are configured as inputs as well
	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
	GPIO_InitStructure.GPIO_Pin  = MIOS32_SPI2_RCLK1_PIN;
	GPIO_Init(MIOS32_SPI2_RCLK1_PORT, &GPIO_InitStructure);
	GPIO_InitStructure.GPIO_Pin  = MIOS32_SPI2_RCLK2_PIN;
	GPIO_Init(MIOS32_SPI2_RCLK2_PORT, &GPIO_InitStructure);
 	GPIO_InitStructure.GPIO_Pin  = MIOS32_SPI2_RCLK3_PIN;
	GPIO_Init(MIOS32_SPI2_RCLK3_PORT, &GPIO_InitStructure);

	// DIN is input with pull-up
	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
	GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
	GPIO_InitStructure.GPIO_Pin  = MIOS32_SPI2_MISO_PIN;
	GPIO_Init(MIOS32_SPI2_MISO_PORT, &GPIO_InitStructure);
      }
#else
    switch( rc_pin ) {
    case 0: MIOS32_SYS_STM_PINSET(MIOS32_SPI2_RCLK1_PORT, MIOS32_SPI2_RCLK1_PIN, pin_value); break;
    case 1: MIOS32_SYS_STM_PINSET(MIOS32_SPI2_RCLK2_PORT, MIOS32_SPI2_RCLK2_PIN, pin_value); break;
    case 2: MIOS32_SYS_STM_PINSET(MIOS32_SPI2_RCLK3_PORT, MIOS32_SPI2_RCLK3_PIN, pin_value); break;
    default: return -4; // unsupported RC pin
    }
    break;
#endif

In the NGC I have:

AINSER n=1 enabled=1 cs=2 num_pins=1

and nothing happens. Which part do I overlook for adding a CS?

Thanks!
Chris

Edited by FantomXR

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Hello Chris

For AINSER8 you have to define muxed=0 at NGC because it's set to 1 by default, but not sure it's your issue here

Can I ask for what reason you need more lines? because you already have two line (if not using AOUT) for 16ch

Also it may be a better workaround to use a muxed MCP3202 for 16ch or MCP3204 for 32ch, I suspect it will request less change at soft side...

I have this in mind since time, but don't start yet...for potential project that need intermediate ADC count and to gain room compared to an AINSER64 with disabled channels.

Best

Zam

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I just have a deeper look even if i'm not confident with code...

pin C1 is already used at J5, maybe you have to deactivate/remove something in the code, also it's the 32F4 ADC

Why don't you use a free pin at j10 ?

Best

Zam

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10 hours ago, Zam said:

Hello Chris

Hi Zam! Thanks for your reply.

10 hours ago, Zam said:

For AINSER8 you have to define muxed=0 at NGC because it's set to 1 by default, but not sure it's your issue here

I've tried that without success.

10 hours ago, Zam said:

Can I ask for what reason you need more lines?

Yes. I prefer having more traces (=not muxed) instead of having less traces and more parts (=muxed). I want to get rid of HC595 and 4051.
In my application I need about 20 analog inputs. So, unfortunately 16ch. are not enough.

9 hours ago, Zam said:

pin C1 is already used at J5, maybe you have to deactivate/remove something in the code, also it's the 32F4 ADC

I thought that too. But I comment out those lines. Also I did a double check I took these lines from mios32_spi.h:

#define MIOS32_SPI2_RCLK1_PORT GPIOA // RC1
#define MIOS32_SPI2_RCLK1_PIN  GPIO_Pin_15
#define MIOS32_SPI2_RCLK1_AF   { GPIO_PinAFConfig(GPIOA, GPIO_PinSource15, GPIO_AF_SPI3); } // only relevant for slave mode
#define MIOS32_SPI2_RCLK2_PORT GPIOB // RC2
#define MIOS32_SPI2_RCLK2_PIN  GPIO_Pin_8
#define MIOS32_SPI2_RCLK2_AF   { }
#define MIOS32_SPI2_RCLK3_PORT GPIOC // RC3
#define MIOS32_SPI2_RCLK3_PIN  GPIO_Pin_1
#define MIOS32_SPI2_RCLK3_AF   { }

and changed the pin for RC1 to PC1 like this:

#define MIOS32_SPI2_RCLK1_PORT GPIOC // RC1
#define MIOS32_SPI2_RCLK1_PIN  GPIO_Pin_1
#define MIOS32_SPI2_RCLK1_AF   { GPIO_PinAFConfig(GPIOC, GPIO_PinSource1, GPIO_AF_SPI3); } // only relevant for slave mode
#define MIOS32_SPI2_RCLK2_PORT GPIOB // RC2
#define MIOS32_SPI2_RCLK2_PIN  GPIO_Pin_8
#define MIOS32_SPI2_RCLK2_AF   { }
#define MIOS32_SPI2_RCLK3_PORT GPIOC // RC3
#define MIOS32_SPI2_RCLK3_PIN  GPIO_Pin_1
#define MIOS32_SPI2_RCLK3_AF   { }

And this is working great (of course with cs=0 in the NGC-file). So I don't think that PC1 is somehow "blocked" for this application. 

It can't be to hard to add more CS. I think I just overlook something...

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Hello Chris

If PC1 work for CS 1 the pin configuration should be ok

21 hours ago, FantomXR said:

and ainser.h:


// Which RC pin of the SPI port should be used for the third module
// allowed values: 0 or 1 for SPI0 (J16:RC1, J16:RC2), 0 for SPI1 (J8/9:RC), 0 or 1 for SPI2 (J19:RC1, J19:RC2)
#ifndef AINSER_SPI_RC_PIN_MODULE3
#define AINSER_SPI_RC_PIN_MODULE3 2
#endif

Are you sure about the pin value here?

 

also did you define modules number ? (ainser.h)

 
// Maximum number of AINSER modules (1..255)
// (Number of modules can be changed via soft-configuration during runtime.)
#ifndef AINSER_NUM_MODULES
#define AINSER_NUM_MODULES 1

#endif

and ainser.c

 
/////////////////////////////////////////////////////////////////////////////
// Internal function to set CS line depending on module
/////////////////////////////////////////////////////////////////////////////
static s32 AINSER_SetCs(u8 module, u8 value)
{
switch( module ) {
case 0: return MIOS32_SPI_RC_PinSet(AINSER_SPI, AINSER_SPI_RC_PIN_MODULE1, value); // spi, rc_pin, pin_value
case 1: return MIOS32_SPI_RC_PinSet(AINSER_SPI, AINSER_SPI_RC_PIN_MODULE2, value); // spi, rc_pin, pin_value

#if AINSER_NUM_MODULES > 2
# error "CS Line for more than 2 modules not prepared yet - please enhance here!"
#endif
}


return -1;

}

Best

Zam

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2 hours ago, Zam said:

Are you sure about the pin value here?

No but I followed up the logic in the code above:

// Which RC pin of the SPI port should be used for the first module
// allowed values: 0 or 1 for SPI0 (J16:RC1, J16:RC2), 0 for SPI1 (J8/9:RC), 0 or 1 for SPI2 (J19:RC1, J19:RC2)
#ifndef AINSER_SPI_RC_PIN_MODULE1
#define AINSER_SPI_RC_PIN_MODULE1 0
#endif

// Which RC pin of the SPI port should be used for the second module
// allowed values: 0 or 1 for SPI0 (J16:RC1, J16:RC2), 0 for SPI1 (J8/9:RC), 0 or 1 for SPI2 (J19:RC1, J19:RC2)
#ifndef AINSER_SPI_RC_PIN_MODULE2
#define AINSER_SPI_RC_PIN_MODULE2 1
#endif

// Which RC pin of the SPI port should be used for the third module
// allowed values: 0 or 1 for SPI0 (J16:RC1, J16:RC2), 0 for SPI1 (J8/9:RC), 0 or 1 for SPI2 (J19:RC1, J19:RC2)
#ifndef AINSER_SPI_RC_PIN_MODULE3
#define AINSER_SPI_RC_PIN_MODULE3 2

 

2 hours ago, Zam said:

also did you define modules number ? (ainser.h)

Not in ainser.h, but in the mio32_config.h with:
 

// enable three AINSER modules
#define AINSER_NUM_MODULES 3

 

2 hours ago, Zam said:

and ainser.c

Sure! I did this:

static s32 AINSER_SetCs(u8 module, u8 value)
{
  switch( module ) {
  case 0: return MIOS32_SPI_RC_PinSet(AINSER_SPI, AINSER_SPI_RC_PIN_MODULE1, value); // spi, rc_pin, pin_value
  case 1: return MIOS32_SPI_RC_PinSet(AINSER_SPI, AINSER_SPI_RC_PIN_MODULE2, value); // spi, rc_pin, pin_value
  case 2: return MIOS32_SPI_RC_PinSet(AINSER_SPI, AINSER_SPI_RC_PIN_MODULE3, value); // spi, rc_pin, pin_value

#if AINSER_NUM_MODULES > 3  
# error "CS Line for more than 2 modules not prepared yet - please enhance here!"
#endif
  }

 

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10 minutes ago, FantomXR said:

No but I followed up the logic in the code above:


// Which RC pin of the SPI port should be used for the first module
// allowed values: 0 or 1 for SPI0 (J16:RC1, J16:RC2), 0 for SPI1 (J8/9:RC), 0 or 1 for SPI2 (J19:RC1, J19:RC2)
#ifndef AINSER_SPI_RC_PIN_MODULE1
#define AINSER_SPI_RC_PIN_MODULE1 0
#endif

// Which RC pin of the SPI port should be used for the second module
// allowed values: 0 or 1 for SPI0 (J16:RC1, J16:RC2), 0 for SPI1 (J8/9:RC), 0 or 1 for SPI2 (J19:RC1, J19:RC2)
#ifndef AINSER_SPI_RC_PIN_MODULE2
#define AINSER_SPI_RC_PIN_MODULE2 1
#endif

// Which RC pin of the SPI port should be used for the third module
// allowed values: 0 or 1 for SPI0 (J16:RC1, J16:RC2), 0 for SPI1 (J8/9:RC), 0 or 1 for SPI2 (J19:RC1, J19:RC2)
#ifndef AINSER_SPI_RC_PIN_MODULE3
#define AINSER_SPI_RC_PIN_MODULE3 2

Ok, the logic is "0, 1 or 2 for SPI2 (J19:RC1, J19:RC2, J5A:A0(nowRC3) )", I have something else(wrong) in mind sorry.

 

I'm afraid I can't help more on this, miss some skill, let wait for a programmer :happy:

Best

Zam

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11 minutes ago, Zam said:

Ok, the logic is "0, 1 or 2 for SPI2 (J19:RC1, J19:RC2, J5A:A0(nowRC3) )", I have something else(wrong) in mind sorry.

This seems to be a good hint! Thanks!

Maybe @TK. could guide us in the right direction! :-)

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You don't need to enhance mios32_spi, just control the additional pin directly from AINSER_SetCs

E.g. let's assume that J10.D0 is unused so far, then add to AINSER_Init():

MIOS32_BOARD_J10A_PinInit(0, MIOS32_BOARD_PIN_MODE_OUTPUT_PP);

and to AINSER_SetCs:

case 2: return MIOS32_BOARD_J10_PinSet(0, value);

Best Regards, Thorsten.

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Thanks for chiming in! 

Is it really so easy? :-) Thanks! I'll try it!!

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14 hours ago, TK. said:

E.g. let's assume that J10.D0 is unused so far, then add to AINSER_Init():

Dear TK,

I undo all changes and added the lines as you suggested. Unfortunately I can not get it working.

I edited the ainser.h like this:

s32 AINSER_Init(u32 mode)
{
  MIOS32_BOARD_J10_PinInit(0, MIOS32_BOARD_PIN_MODE_OUTPUT_PP);

  s32 status = 0;
  int module, pin;

  // currently only mode 0 supported
  if( mode != 0 )
    return -1; // unsupported mode

#if AINSER_SPI_OUTPUTS_OD
  // pins in open drain mode (to pull-up the outputs to 5V)
  status |= MIOS32_SPI_IO_Init(AINSER_SPI, MIOS32_SPI_PIN_DRIVER_STRONG_OD);
#else
  // pins in push-poll mode (3.3V output voltage)
  status |= MIOS32_SPI_IO_Init(AINSER_SPI, MIOS32_SPI_PIN_DRIVER_STRONG);
#endif

  // SPI Port will be initialized in AINSER_Update()

  num_used_modules = AINSER_NUM_MODULES;
#if AINSER_NUM_MODULES > 8
# error "If more than 8 AINSER_NUM_MODULES should be supported, the ainser_enable_mask variable type has to be changed from u8 to u16 (up to 16) or u32 (up to 32)"
#endif
#if AINSER_NUM_MODULES > 8
# error "If more than 8 AINSER_NUM_MODULES should be supported, the ainser_muxed_mask variable type has to be changed from u8 to u16 (up to 16) or u32 (up to 32)"
#endif

  for(module=0; module<AINSER_NUM_MODULES; ++module) {
    num_used_pins[module] = AINSER_NUM_PINS;

    // ensure that CS is deactivated
    AINSER_SetCs(module, 1);

    AINSER_EnabledSet(module, 1);
    AINSER_MuxedSet(module, 1);
    AINSER_NumPinsSet(module, AINSER_NUM_PINS);
    AINSER_DeadbandSet(module, MIOS32_AIN_DEADBAND);

    // clear all values
    for(pin=0; pin<AINSER_NUM_PINS; ++pin) {
      ain_pin_values[module][pin] = 0;
    }
    previous_ain_pin_value = 0;
  }

  return status;
}


[]


static s32 AINSER_SetCs(u8 module, u8 value)
{
  switch( module ) {
  case 0: return MIOS32_SPI_RC_PinSet(AINSER_SPI, AINSER_SPI_RC_PIN_MODULE1, value); // spi, rc_pin, pin_value
  case 1: return MIOS32_SPI_RC_PinSet(AINSER_SPI, AINSER_SPI_RC_PIN_MODULE2, value); // spi, rc_pin, pin_value
  case 2: return MIOS32_BOARD_J10_PinSet(0, value);

#if AINSER_NUM_MODULES > 3
# error "CS Line for more than 2 modules not prepared yet - please enhance here!"
#endif
  }

But when I now connect the Chipselect to PE8, which is D0 on J10A, nothing happens.

Any idea?

Thanks,
Chris

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Additional notes: could be that you rely on 5V output - in this case change MIOS32_BOARD_PIN_MODE_OUTPUT_PP to MIOS32_BOARD_PIN_MODE_OUTPUT_OD, and add a 1k pull-up to 5V to this pin.

And if J10A is already used for SCS inputs (standard), just take J10B.D0 (pin index #8)

Best Regards, Thorsten.

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Thank you very much!

I'll give it a try. 

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