latigid on

Surely it's the SEQ V4... seeing as that's the forum he's posting in.

These are SIL (single in-line) headers, no? Just buy a row of 40 or 50 and snap/cut them to fit.

Mike :no: Tim est un membre de notre organisation depuis plus de 10 ans, il est digne de confiance ici Il est normal d'attendre une semaine pour une réponse, pense que si tout le monde lui-demande, il ne sera pas le temps d'envoyer les commandes! EDIT: I don't know why I keep doing that, sorry Smash. Perhaps European MIDIBoxer = Mike for me. :facepalm: On the other hand, feel free to go through Mike if you need something shipped from Europe: http://www.mikes-elektronikseite.de/

Protection: yes, definitely. The two systems used are buffers/level shifters (also gives you a +5 V logic level in the case of newer Core modules) and 220R resistors for short circuit protection.

Please explain your set up. Are you using the Wilba control surface? Do you have the SEQ running correctly? Have you edited the hardware config file?

No, what's your set up? Have you level-shifted the 3.3 V signal?

Just a thought here: J19 on the LPC core is already buffered, while on the STM 32 it isn't. This might make all the difference! Also, the pinning seems to be a bit inconsistent: J19: Vs Vd So Sc Rc1 J1 : Vs Vd So Rc Md TK : Vs Vd Rc1 So Sc The J19-J1 pinning is therefore not 1:1?

This revision has a connector for J19, for ocassions when the AOUT module is outside the case. The three data lines are buffered by a CD4050, unfortunately it's SMD as I couldn't find a part that would fit easily. One of the additional buffers is available, there wasn't room to route up the other two so they are tied to ground. The connectors share the same pins as J4 from the AOUT. EDIT: Pic

It might help if you list your location. Are these the two-piece PCBs which need wiring together?

Another approach: http://www.reenigne.org/blog/physical-tone-matrix/

Maybe run the Eagle DRC? There are two vias which overlap and many traces below the minimum clearance. Best of luck!

Good job, but I don't think that there are enough mount holes. These things are pretty long, covered in components and one would be applying pressure over the whole surface. Too much flex in my opinion.

I can squeeze in one more connector on the top left side for people who will send the signals from J19 to an external AOUT module. Should the three data lines be buffered also? This should be doable with an SMT chip.

Okay, I think I'm done now. I think that it looks okay but I'm not 100% sure on the regulator circuit. If somebody could check that would be great. Also: no answer as of yet on the MIDI IN/OUT 3 situation. In any case, I have brought out the 3.3 V and 5.0 V connections.

It might involve specially programmed 16F88s. Note that the Quad IIC has a circuit-level implementation (EDIT pins 12 and 13 as shown on the schem.) for addressing the IICs (MIDI OUTs), so you might need a custom PCB for more outputs.

USB MIDI perhaps?

I think that this can be more efficient with only two 7407 chips and a switchable pull-up voltage instead. Working on this now.

If you can't beat 'em, join 'em. Following a discovery that the I am working on a revised design based on SN7407 level shifters. (If you want a board from the the buffers work as expected, please PM me for details.) Simple enough circuit but I have several questions. First off: any problem with cascading the buffers this way? The idea is to have a switchable output between +5 (also serving as Vdd for the ICs) and an adjustable voltage which is derived from a low-dropout regulator (say 12 V or higher). It is more simple to route when the output of the first buffer connects to the input of the second, but would it be better to tie the inputs of both buffers together instead? What should the handling of MIDI IN 3 and MIDI OUT 3 be? Presumably MIDI IN 3 should go through an optocoupler with a 3.3 V pull-up on the Core side: http://ucapps.de/mbhp/mbhp_core_lpc17_midi3_midi4_extension.pdf Hence, no level shifting is necessary I think. But for MIDI OUT 3? From the Quad-IIC schematic it is not clear whether the signal needs to be level-shifted. Will a 3.3 V output be compatible with the 8-bit core of the BLM? In this case, MIDI OUT 3 is level shifted: http://ucapps.de/mbhp/mbhp_core_lpc17_output_buffers.pdf For these two, it isn't: http://ucapps.de/mbhp/mbhp_core_stm32_midi3_extension.pdf http://ucapps.de/midibox_blm/blm_connector_mbseq.pdf There is a 3.3 V pull-up for the LPC core: http://ucapps.de/mbhp/mbhp_core_lpc17_midi3_midi4_extension.pdf Even though I will not use the LPC core, I plan to make it compatible with both for the greatest flexibility. Some clarification would be welcome. Cheers,

I'm not really familiar with the LTC module sorry, and I mis-spoke when I said MIDI thru before, of course you would be just duplicating the ports. It seems as if the serial functionality of the LTC module is not really useful any more. As far as I know you can use the buffer/level shifter IC to do this duplication. Hope that helps,