Okay, another concept but now it's for CV inputs for MBCV. Again I'm abusing centre-off toggles. The idea is to maximise the scaled signal input while protecting the ADC from over- and undervoltages. Each inverting gain stage should give a final input range of 0-3.3 V.
The centre-off position is for 0-5 V inputs. The two stages are set for -0.66 and -1 gain. Note the (variable) resistor is out of circuit when the switch is in the middle position.
The other two positions are configured for -5 to 5 and 0 to 10 V inputs. One switch pole adds a +5 V offset, while the other adds in a second resistor for both conditions. So we have two gain stages of -0.66 and -0.5, again giving a final input range of 0-3.3 V.
The output of the second op amp is current limited and clamped between 3.3 V and 0 V. It might be useful to use BAT54S Schottky diodes as they have a low forward voltage (e.g. 320 mV at 1 mA, 400 mV at 10 mA). It might not be enough though as apparently the STM32F4 AINs shouldn't exceed Vcc (3.3 V). But Vcc max is 3.6 V? I'd appreciate some advice here. More current limiting?
How are the ADCs handled on the STM cores? Are some bits discarded? Is it better to limit the voltage more conservatively? I thought about rail-to-rail op amp limiting (Vcc = 3.3 V) but it seems that most chips max out at 1 volt below Vcc.
Reference threads:
http://www.muffwiggler.com/forum/viewtopic.php?t=104872
http://mutable-instruments.net/forum/discussion/938/cv-inputs-how-to-protect-them-from-negative-or-too-high-voltages/p1
http://www.eevblog.com/forum/projects/pic-input-protection-using-a-zener-diode/msg21840/?PHPSESSID=33bbdf2e2a88957db87cce882680f1ca#msg21840
http://www.nxp.com/documents/data_sheet/BAT54_SER.pdf